US 11,876,126 B2
Method for manufacturing semiconductor device
Shunpei Yamazaki, Tokyo (JP); Masami Jintyou, Tochigi (JP); and Yukinori Shima, Gunma (JP)
Assigned to Semiconductor Energy Laboratory Co., Ltd., Atsugi (JP)
Filed by SEMICONDUCTOR ENERGY LABORATORY CO., LTD., Atsugi (JP)
Filed on Aug. 10, 2021, as Appl. No. 17/398,037.
Application 17/398,037 is a continuation of application No. 16/429,194, filed on Jun. 3, 2019, granted, now 11,094,804.
Application 16/429,194 is a continuation of application No. 14/645,781, filed on Mar. 12, 2015, granted, now 10,361,290, issued on Jul. 23, 2019.
Claims priority of application No. 2014-051798 (JP), filed on Mar. 14, 2014.
Prior Publication US 2022/0013657 A1, Jan. 13, 2022
Int. Cl. H01L 29/66 (2006.01); H01L 29/786 (2006.01); H01L 29/49 (2006.01); H01L 21/02 (2006.01); H01L 29/423 (2006.01)
CPC H01L 29/66969 (2013.01) [H01L 21/0234 (2013.01); H01L 21/0262 (2013.01); H01L 21/02326 (2013.01); H01L 21/02472 (2013.01); H01L 21/02483 (2013.01); H01L 21/02554 (2013.01); H01L 21/02565 (2013.01); H01L 21/02573 (2013.01); H01L 29/42384 (2013.01); H01L 29/4908 (2013.01); H01L 29/4966 (2013.01); H01L 29/7869 (2013.01); H01L 29/78621 (2013.01)] 15 Claims
OG exemplary drawing
 
1. A method for manufacturing a semiconductor device including a transistor, the method comprising steps of:
forming an oxide semiconductor film;
forming a first insulating film over the oxide semiconductor film;
forming a metal oxide film over and in contact with the first insulating film;
performing a heat treatment after forming the metal oxide film;
forming a conductive film over the metal oxide film after performing the heat treatment; and
forming a second insulating film over the conductive film,
wherein a top surface of the oxide semiconductor film comprises a first region, a second region, and a third region between the first region and the second region,
wherein each of the first region and the second region is in contact with the second insulating film,
wherein the conductive film overlaps with the third region with the first insulating film and the metal oxide film therebetween,
wherein the second insulating film comprises hydrogen, and
wherein the metal oxide film and the conductive film are collectively configured to be a gate electrode of the transistor.