US 11,876,088 B2
Shared well structure, layout, and method
Yang Zhou, Hsinchu (TW); Liu Han, Hsinchu (TW); Qingchao Meng, Hsinchu (TW); XinYong Wang, Hsinchu (TW); and ZeJian Cai, Hsinchu (TW)
Assigned to TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD., Hsinchu (TW); TSMC NANJING COMPANY, LIMITED, Nanjiang (CN); and TSMC CHINA COMPANY, LIMITED, Shanghai (CN)
Filed by TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD., Hsinchu (TW); TSMC CHINA COMPANY, LIMITED, Shanghai (CN); and TSMC NANJING COMPANY, LIMITED, Jiangsu (CN)
Filed on Nov. 16, 2021, as Appl. No. 17/527,883.
Claims priority of application No. 202110641540.8 (CN), filed on Jun. 9, 2021.
Prior Publication US 2022/0399326 A1, Dec. 15, 2022
Int. Cl. H01L 27/02 (2006.01); H01L 27/092 (2006.01); H01L 25/065 (2023.01); H01L 23/48 (2006.01); H01L 21/265 (2006.01); H01L 21/768 (2006.01); H01L 21/8238 (2006.01); H01L 25/00 (2006.01); G06F 30/392 (2020.01); H01L 21/74 (2006.01)
CPC H01L 27/0207 (2013.01) [G06F 30/392 (2020.01); H01L 21/26513 (2013.01); H01L 21/74 (2013.01); H01L 21/76898 (2013.01); H01L 21/823892 (2013.01); H01L 23/481 (2013.01); H01L 25/0657 (2013.01); H01L 25/50 (2013.01); H01L 27/0928 (2013.01); H01L 2225/06513 (2013.01); H01L 2225/06541 (2013.01)] 20 Claims
OG exemplary drawing
 
1. An integrated circuit (IC) structure comprising:
a first continuous well being one of an n-well or a p-well, the first continuous well comprising:
a first well portion extending in a first direction;
a second well portion extending from the first well portion in a second direction perpendicular to the first direction; and
a third well portion extending from the first well portion in the second direction parallel to the second well portion.