US 11,876,052 B2
Semiconductor die bonding structure
Na Bin Won, Icheon-si (KR); and Jong Hoon Kim, Icheon-si (KR)
Assigned to SK hynix Inc., Icheon-si (KR)
Filed by SK hynix Inc., Icheon-si (KR)
Filed on May 19, 2021, as Appl. No. 17/324,973.
Claims priority of application No. 10-2021-0001299 (KR), filed on Jan. 6, 2021.
Prior Publication US 2022/0216155 A1, Jul. 7, 2022
Int. Cl. H01L 23/04 (2006.01); H01L 23/538 (2006.01); H01L 25/065 (2023.01)
CPC H01L 23/5384 (2013.01) [H01L 23/5386 (2013.01); H01L 25/0657 (2013.01)] 18 Claims
OG exemplary drawing
 
1. A semiconductor die bonding structure, comprising:
a lower die including a lower top bonding dielectric layer and lower connection structures; and
an upper die stacked over the lower die in a vertical direction and including an upper bottom bonding dielectric layer and upper connection structures,
wherein:
the lower top bonding dielectric layer and the upper bottom bonding dielectric layer are directly bonded to each other,
each of the lower connection structures includes a lower top bonding pad structure having a first width in a first horizontal direction and a second width in a second horizontal direction,
each of the upper connection structures includes an upper bottom bonding pad structure having a third width in the first horizontal direction and a fourth width in the second horizontal direction;
the first horizontal direction, the second horizontal direction, and the vertical direction are substantially perpendicular to one another,
the second width is greater than the first width, and
the second width is greater than the fourth width.