US 11,875,874 B2
Data structures with multiple read ports
Jonathan Alexander Ross, Palo Alto, CA (US); and Gregory M. Thorson, Palo Alto, CA (US)
Assigned to Groq, Inc., Mountain View, CA (US)
Filed by Groq, Inc., Mountain View, CA (US)
Filed on Aug. 9, 2021, as Appl. No. 17/397,158.
Application 17/397,158 is a continuation of application No. 16/132,196, filed on Sep. 14, 2018, granted, now 11,114,138.
Claims priority of provisional application 62/559,390, filed on Sep. 15, 2017.
Prior Publication US 2022/0101896 A1, Mar. 31, 2022
Int. Cl. G11C 7/10 (2006.01); G06F 9/30 (2018.01); G06F 9/38 (2018.01); G11C 7/22 (2006.01)
CPC G11C 7/1075 (2013.01) [G06F 9/30029 (2013.01); G06F 9/3887 (2013.01); G11C 7/22 (2013.01)] 19 Claims
OG exemplary drawing
 
1. A memory configured to allow for concurrent read requests for data from each of a plurality of output read ports, comprising:
first, second, and third memory sub-structures each storing respective subsets of data corresponding to a first subset, a second subset, and a difference subset generated from the first and second subsets, respectively, and each having respective first and second read ports through which common data of the respective subsets of data stored by the sub-structure can be read concurrently in parallel;
a first access circuit connected to the first read ports of each of the first, second, and third memory sub-structures, and
a second access circuit connected to the second read ports of each of the first, second, and third memory sub-structures,
wherein each of the first and second access circuits comprise respective first and second output read ports, and are configured to satisfy concurrent read requests for data of the subsets of data stored on the first memory sub-structure from both the first and second output read ports, by passing data from the first memory sub-structure to the first output read port and concurrently passing data reconstructed using data from the second and third memory sub-structures to the second output read port.