US 11,875,868 B2
Quick reliability scan for memory device
Saeed Sharifi Tehrani, San Diego, CA (US); and Vamsi Pavan Rayaprolu, San Jose, CA (US)
Assigned to MICRON TECHNOLOGY, INC., Boise, ID (US)
Filed by Micron Technology, Inc., Boise, ID (US)
Filed on Dec. 6, 2022, as Appl. No. 18/076,225.
Application 18/076,225 is a continuation of application No. 17/395,187, filed on Aug. 5, 2021, granted, now 11,545,232.
Prior Publication US 2023/0097679 A1, Mar. 30, 2023
This patent is subject to a terminal disclaimer.
Int. Cl. G11C 29/44 (2006.01); G11C 29/12 (2006.01); G11C 16/10 (2006.01); G11C 7/10 (2006.01); G11C 7/20 (2006.01)
CPC G11C 29/4401 (2013.01) [G11C 7/1063 (2013.01); G11C 7/20 (2013.01); G11C 16/102 (2013.01); G11C 29/12005 (2013.01); G11C 29/12015 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A method comprising:
for a block of a plurality of blocks of a plurality of different block types, each block comprising a plurality of pages of memory of a physical memory device, identifying a subset of the plurality of pages of the block, wherein the subset of the plurality of pages includes a number of pages less than a total number of pages of the block;
scanning the block by only scanning the subset of the plurality of pages of the block for a fold condition;
determining that a page of the subset of the plurality of pages has the fold condition; and
after the plurality of blocks has been scanned, requesting folding of the block in response to determining the page has the fold condition.