US 11,875,847 B2
Self-referenced and regulated sensing solution for phase change memory with ovonic threshold switch
Jean-Michel Portal, Saint-Savournin (FR); Vincenzo Della Marca, Marseilles (FR); Jean-Pierre Walder, Marseilles (FR); Julien Gasquez, Echirolles (FR); and Philippe Boivin, Venelles (FR)
Assigned to Universite D'Aix Marseille, Marseilles (FR); Centre National De La Recherche Scientifique, Paris (FR); STMicroelectro (Crolles 2) SAS, Crolles (FR); and STMicroelectronics (Rousset) SAS, Rousset (FR)
Filed by Universite D'Aix Marseille, Marseilles (FR); Centre National De La Recherche Scientifique, Paris (FR); STMicroelectronics (Crolles 2) SAS, Crolles (FR); and STMicroelectronics (Rousset) SAS, Rousset (FR)
Filed on Feb. 16, 2022, as Appl. No. 17/673,550.
Prior Publication US 2023/0260574 A1, Aug. 17, 2023
Int. Cl. G11C 13/00 (2006.01)
CPC G11C 13/004 (2013.01) [G11C 13/0004 (2013.01); G11C 13/0026 (2013.01); G11C 13/0028 (2013.01); G11C 2013/0054 (2013.01); G11C 2213/72 (2013.01)] 28 Claims
OG exemplary drawing
 
1. A sense circuit for use with an array of memory cells, the sense circuit comprising:
a regulation circuit configured to receive as input an input voltage, a full read voltage from reading of a selected cell of the array of memory cells, and a fractional read voltage applied to unselected cells of the array of memory cells, the regulation circuit configured to generate a regulated voltage and a regulated fractional voltage based upon the input, wherein the regulated voltage and the regulated fractional voltage are used in reading of the selected cell of the array of memory cells;
a capacitor circuit configured to generate a reference voltage through charge sharing between an input capacitor and a reference capacitor; and
a comparator circuit configured to generate a data output signal based upon a comparison between the reference voltage and the input voltage.