US 11,875,845 B2
Memory device and operating method of the memory device
Myeong Cheol Son, Icheon-si (KR)
Assigned to SK hynix Inc., Icheon-si (KR)
Filed by SK hynix Inc., Icheon-si (KR)
Filed on Oct. 27, 2021, as Appl. No. 17/512,128.
Claims priority of application No. 10-2021-0064410 (KR), filed on May 18, 2021.
Prior Publication US 2022/0375514 A1, Nov. 24, 2022
Int. Cl. G11C 11/56 (2006.01); G11C 16/34 (2006.01); G11C 16/10 (2006.01); G11C 16/04 (2006.01)
CPC G11C 11/5628 (2013.01) [G11C 11/5671 (2013.01); G11C 16/0483 (2013.01); G11C 16/10 (2013.01); G11C 16/3445 (2013.01); G11C 16/3459 (2013.01)] 19 Claims
OG exemplary drawing
 
1. A method for operating a memory device for performing a program operation of programming data in selected memory cells among a plurality of memory cells, the method comprising:
applying a program voltage to the selected memory cells;
verifying program states of memory cells programmed to any one program state among a plurality of program states distinguished based on a plurality of threshold voltages among the selected memory cells;
applying a predetermined lowest program voltage to the selected memory cells after a verify operation on the plurality of program states passes; and
verifying an erase state of memory cells programmed to an erase state among the selected memory cells after the lowest program voltage is applied to the selected memory cells.