US 11,875,837 B2
Semiconductor device and electronic device
Yoshiyuki Kurokawa, Kanagawa (JP); Munehiro Kozuma, Kanagawa (JP); and Takeshi Aoki, Kanagawa (JP)
Assigned to Semiconductor Energy Laboratory Co., Ltd., Atsugi (JP)
Appl. No. 17/617,969
Filed by SEMICONDUCTOR ENERGY LABORATORY CO., LTD., Atsugi (JP)
PCT Filed Jun. 8, 2020, PCT No. PCT/IB2020/055352
§ 371(c)(1), (2) Date Dec. 10, 2021,
PCT Pub. No. WO2020/254909, PCT Pub. Date Dec. 24, 2020.
Claims priority of application No. 2019-115347 (JP), filed on Jun. 21, 2019; application No. 2019-137473 (JP), filed on Jul. 26, 2019; application No. 2019-163598 (JP), filed on Sep. 9, 2019; application No. 2019-200140 (JP), filed on Nov. 1, 2019; application No. 2019-211005 (JP), filed on Nov. 22, 2019; and application No. 2019-221167 (JP), filed on Dec. 6, 2019.
Prior Publication US 2022/0254401 A1, Aug. 11, 2022
Int. Cl. G11C 11/405 (2006.01); G01N 33/00 (2006.01); G01V 3/02 (2006.01); H01L 27/12 (2006.01); H01L 29/786 (2006.01); H10B 12/00 (2023.01)
CPC G11C 11/405 (2013.01) [G01N 33/0001 (2013.01); G01V 3/02 (2013.01); H01L 27/124 (2013.01); H01L 27/1225 (2013.01); H01L 27/1255 (2013.01); H01L 29/7869 (2013.01); H01L 29/78648 (2013.01); H10B 12/00 (2023.02)] 20 Claims
OG exemplary drawing
 
1. A semiconductor device, comprising:
a first circuit, a second circuit, a first cell, a second cell, a first wiring, and a second wiring,
wherein the first cell comprises a first transistor,
wherein the second cell comprises a second transistor,
wherein the first cell is electrically connected to the first circuit through the first wiring,
wherein the first cell is electrically connected to the second circuit through the second wiring,
wherein the second cell is electrically connected to the second circuit through the second wiring,
wherein the first circuit has a function of making a first current flow from the first circuit to the first cell through the first wiring,
wherein the second circuit has a function of making a second current flow from the second circuit to the second cell through the second wiring and a function of supplying a first potential corresponding to the second current from the second circuit to each of the first cell and the second cell through the second wiring,
wherein the first cell has a function of setting a current flowing between a first terminal and a second terminal of the first transistor to the first current,
wherein the second cell has a function of setting a current flowing between a first terminal and a second terminal of the second transistor to the second current,
wherein the second circuit has a function of changing the second current flowing in the second wiring to a third current to change the first potential supplied to each of the first cell and the second cell to a second potential,
wherein the first cell has a function of changing the first current flowing between the first terminal and the second terminal of the first transistor to a fourth current corresponding to a difference between the first potential and the second potential,
wherein an amount of each of the first current and the fourth current is an amount of current flowing when the first transistor operates in a subthreshold region, and
wherein an amount of each of the second current and the third current is an amount of current flowing when the second transistor operates in a subthreshold region.