CPC G09G 3/3275 (2013.01) [G09G 3/3688 (2013.01); G09G 2310/0286 (2013.01); G09G 2310/0291 (2013.01); G09G 2310/0294 (2013.01)] | 4 Claims |
1. A display device comprising:
a display panel;
a data driver which provides data voltages to the display panel; and
a controller which provides output image data to the data driver, the controller including:
a data line memory which stores input image data for a pixel row of the display panel; and
an address line memory which stores addresses for the input image data,
wherein in a case where the display panel is a dead space reduced display panel, the address line memory stores different values to the addresses, respectively, in a different order than in a case where the display panel is a normal display panel,
wherein the input image data stored in the data line memory include first through (4N)-th pixel data for pixels of the pixel row, where N is an integer greater than 0,
wherein the addresses stored in the address line memory include first through (4N)-th addresses, and
wherein, in the case where the display panel is the normal display panel, the address line memory stores the values of 1 through 4N as the first through (4N)-th addresses, respectively, and the controller sequentially outputs the first through (4N)-th pixel data as the output image data in response to the addresses having the values of 1 through 4N.
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