CPC G06F 11/1044 (2013.01) [G06N 10/00 (2019.01); G06N 10/70 (2022.01)] | 20 Claims |
1. A fault tolerant quantum computation device, comprising a quantum Clifford circuit decomposed into s logic Clifford circuits, s being a positive integer, wherein:
the s logic Clifford circuits of the quantum Clifford circuit are configured to process k logic qubits;
an average number of physical qubits associated with the s logic Clifford circuits is at or less than 0(k);
an average number of quantum gates associated with the s logic Clifford circuits is at or less than 0(k2/log(k)); and
an average number of auxiliary quantum states prepared associated with the s logic Clifford circuits is at or less than 0(1).
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