US 11,874,695 B2
Storage device and storage system including the same
Kwanwoo Noh, Seoul (KR); Sungho Seo, Suwon-si (KR); Yongwoo Jeong, Seoul (KR); Dongwoo Nam, Seongnam-si (KR); Myungsub Shin, Suwon-si (KR); and Hyunkyu Jang, Hwaseong-si (KR)
Assigned to Samsung Electronics Co., Ltd., Gyeonggi-do (KR)
Filed by Samsung Electronics Co., Ltd., Suwon-si (KR)
Filed on Dec. 9, 2022, as Appl. No. 18/064,002.
Application 18/064,002 is a continuation of application No. 17/179,830, filed on Feb. 19, 2021, granted, now 11,561,571.
Claims priority of application No. 10-2020-0021205 (KR), filed on Feb. 20, 2020; and application No. 10-2020-0128277 (KR), filed on Oct. 5, 2020.
Prior Publication US 2023/0112284 A1, Apr. 13, 2023
Int. Cl. G06F 1/08 (2006.01); G06F 3/06 (2006.01); G11C 7/22 (2006.01); G11C 16/32 (2006.01); G06F 1/04 (2006.01); G06F 13/42 (2006.01); H04L 7/00 (2006.01)
CPC G06F 1/08 (2013.01) [G06F 1/04 (2013.01); G06F 3/0632 (2013.01); G06F 3/0658 (2013.01); G06F 3/0679 (2013.01); G06F 13/4291 (2013.01); G11C 7/22 (2013.01); G11C 16/32 (2013.01); H04L 7/0004 (2013.01); H04L 7/0008 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A storage device comprising:
a nonvolatile memory; and
a controller coupled to the nonvolatile memory, and configured to receive a reference clock signal and to determine a reference clock frequency based on a calculation involving the reference clock signal,
wherein the controller is configured to perform a link startup process with an external device in a first mode before the controller receives the reference clock signal,
the controller is configured to perform the link startup process with the external device in a second mode based on the reference clock frequency after the controller receives the reference clock signal, and
the controller exchanges data with the external device, when the link startup process is completed.