US 11,874,513 B2
Package structure
Chia-Lun Chang, Tainan (TW); Ching-Hua Hsieh, Hsinchu (TW); Cheng-Ting Chen, Taichung (TW); Hsiu-Jen Lin, Hsinchu County (TW); Hsuan-Ting Kuo, Taichung (TW); Chia-Shen Cheng, Hsinchu County (TW); and Chih-Chiang Tsao, Taoyuan (TW)
Assigned to Taiwan Semiconductor Manufacturing Company, Ltd., Hsinchu (TW)
Filed by Taiwan Semiconductor Manufacturing Company, Ltd., Hsinchu (TW)
Filed on Feb. 1, 2023, as Appl. No. 18/162,712.
Application 18/162,712 is a continuation of application No. 17/315,376, filed on May 10, 2021, granted, now 11,585,992.
Application 17/315,376 is a continuation of application No. 16/281,090, filed on Feb. 21, 2019, granted, now 11,002,927, issued on May 11, 2021.
Prior Publication US 2023/0168451 A1, Jun. 1, 2023
This patent is subject to a terminal disclaimer.
Int. Cl. G02B 6/42 (2006.01); H01L 23/538 (2006.01); H01L 25/18 (2023.01); H01L 23/31 (2006.01); H01L 23/00 (2006.01); H01L 25/00 (2006.01); H01L 21/683 (2006.01); H01L 21/56 (2006.01); G02B 6/43 (2006.01); H05K 1/18 (2006.01); H05K 1/02 (2006.01)
CPC G02B 6/428 (2013.01) [G02B 6/4214 (2013.01); G02B 6/4253 (2013.01); G02B 6/43 (2013.01); H01L 21/561 (2013.01); H01L 21/565 (2013.01); H01L 21/6835 (2013.01); H01L 23/3128 (2013.01); H01L 23/5386 (2013.01); H01L 24/24 (2013.01); H01L 24/82 (2013.01); H01L 24/96 (2013.01); H01L 25/18 (2013.01); H01L 25/50 (2013.01); H05K 1/0274 (2013.01); H05K 1/181 (2013.01); H01L 21/568 (2013.01); H01L 2221/68359 (2013.01); H01L 2221/68372 (2013.01); H01L 2221/68381 (2013.01); H01L 2224/215 (2013.01); H01L 2224/24225 (2013.01); H01L 2224/821 (2013.01); H01L 2224/82005 (2013.01); H01L 2224/95001 (2013.01); H01L 2924/12042 (2013.01); H01L 2924/12043 (2013.01); H05K 2201/10121 (2013.01); H05K 2201/10151 (2013.01); H05K 2201/2054 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A package structure, comprising:
a circuit board comprising an optical waveguide;
a fanout package disposed over the circuit board, the fanout package comprising photoelectric integrated circuit dies, an insulating encapsulant laterally encapsulating the photoelectric integrated circuit dies, a redistribution circuit layer covering the photoelectric integrated circuit dies and the insulating encapsulant, and the photoelectric integrated circuit dies communicating with each other through the optical waveguide of the circuit board, wherein the redistribution circuit layer comprises a first optical window and a second optical window, the first optical window is between a first end of the optical waveguide and the photoelectric integrated circuit dies, and the second optical window is between a second end of the optical waveguide and the photoelectric integrated circuit dies.