US 11,873,560 B2
Abnormality detection system and control board
Katsuhito Hirose, Yamanashi (JP); Toshio Hasegawa, Yamanashi (JP); Shohei Yoshida, Yamanashi (JP); Takeshi Shinohara, Yamanashi (JP); and Shinji Kawasaki, Yamanashi (JP)
Assigned to TOKYO ELECTRON LIMITED, Tokyo (JP)
Appl. No. 16/088,102
Filed by Tokyo Electron Limited, Tokyo (JP)
PCT Filed Mar. 15, 2017, PCT No. PCT/JP2017/010496
§ 371(c)(1), (2) Date Sep. 25, 2018,
PCT Pub. No. WO2017/169804, PCT Pub. Date Oct. 5, 2017.
Claims priority of application No. 2016-066052 (JP), filed on Mar. 29, 2016.
Prior Publication US 2020/0299841 A1, Sep. 24, 2020
Int. Cl. C23C 16/52 (2006.01); G05B 23/02 (2006.01); C23C 16/455 (2006.01); G05B 19/048 (2006.01); H01L 21/67 (2006.01)
CPC C23C 16/52 (2013.01) [C23C 16/45536 (2013.01); C23C 16/45544 (2013.01); G05B 19/048 (2013.01); G05B 23/0221 (2013.01); H01L 21/67253 (2013.01); G05B 2219/45026 (2013.01)] 12 Claims
OG exemplary drawing
 
1. A substrate processing apparatus with an abnormality detection system, comprising:
a processing container; and
a gas supply source configured to supply a plurality of gases into the processing container, and
the abnormality detection system including:
a first controller configured to control the substrate processing apparatus and serve as a high-level controller; and
a second controller including a memory, and configured to control a device provided in the substrate processing apparatus according to an instruction from the first controller and serve as a low-level controller, the device including a high-frequency power supply and a matcher,
wherein the second controller is configured to:
collect a status signal for the device at a predetermined sampling interval for a predetermined time period in a predetermined collecting cycle, the status signal for the device including a signal of a matching position of the matcher, and
accumulate the status signal for the device in the memory, and the first controller that serves as the high-level controller includes an abnormality determination circuitry configured to:
acquire accumulated status signals for the device from the memory of the second controller that serves as the low-level controller at a time interval equal to or longer than the predetermined time period during which the second controller collects the status signals for the device at the predetermined sampling interval, the time interval being longer than the predetermined sampling interval, and
determine presence or absence of an abnormality in the device based on the status signals for the device including a peak value, a median value and an average value of the signal of the matching position of the matcher.