US 12,199,123 B2
Semiconductor device including a structure for higher integration
Yoshiya Hagimoto, Kanagawa (JP); and Nobutoshi Fujii, Kanagawa (JP)
Assigned to SONY SEMICONDUCTOR SOLUTIONS CORPORATION, Kanagawa (JP)
Filed by SONY SEMICONDUCTOR SOLUTIONS CORPORATION, Kanagawa (JP)
Filed on Jul. 19, 2023, as Appl. No. 18/354,792.
Application 18/354,792 is a continuation of application No. 17/279,962, granted, now 11,742,374, previously published as PCT/JP2019/036321, filed on Sep. 17, 2019.
Claims priority of application No. 2018-189792 (JP), filed on Oct. 5, 2018.
Prior Publication US 2023/0361145 A1, Nov. 9, 2023
This patent is subject to a terminal disclaimer.
Int. Cl. H01L 31/00 (2006.01); H01L 23/00 (2006.01); H01L 27/146 (2006.01)
CPC H01L 27/14634 (2013.01) [H01L 24/05 (2013.01); H01L 24/08 (2013.01); H01L 24/80 (2013.01); H01L 27/1469 (2013.01); H01L 2224/03462 (2013.01); H01L 2224/03845 (2013.01); H01L 2224/05147 (2013.01); H01L 2224/05556 (2013.01); H01L 2224/05564 (2013.01); H01L 2224/05647 (2013.01); H01L 2224/08057 (2013.01); H01L 2224/08121 (2013.01); H01L 2224/08145 (2013.01); H01L 2224/80895 (2013.01); H01L 2224/80935 (2013.01)] 10 Claims
OG exemplary drawing
 
1. A semiconductor device, comprising:
a first semiconductor substrate that includes a first metal portion including a first protruding portion and a first base portion, wherein
the first protruding portion includes a first abutting surface,
the first base portion is linked to the first protruding portion, and
an area corresponding to the first base portion is greater than an area corresponding to the first protruding portion in a plane orthogonal to a stack direction of the first semiconductor substrate and a second semiconductor substrate;
a first barrier layer that surrounds the first protruding portion and the first base portion in a plane parallel to the stack direction of the first semiconductor substrate and the second semiconductor substrate;
the second semiconductor substrate that includes a second metal portion including a second protruding portion and a second base portion, wherein
the second protruding portion includes a second abutting surface that abuts the first abutting surface,
the second base portion is linked to the second protruding portion, and
the second semiconductor substrate is stacked on the first semiconductor substrate; and
a second barrier layer that surrounds the second protruding portion and the second base portion in the plane parallel to the stack direction of the first semiconductor substrate and the second semiconductor substrate.