US 11,871,617 B2
Light emitting display device and manufacturing method thereof
Keun Woo Kim, Seongnam-si (KR); Tae Wook Kang, Seongnam-si (KR); Han Bit Kim, Seoul (KR); Bum Mo Sung, Hanam-si (KR); Do Kyeong Lee, Yongin-si (KR); and Jae Seob Lee, Seoul (KR)
Assigned to SAMSUNG DISPLAY CO., LTD., Gyeonggi-Do (KR)
Filed by Samsung Display Co., LTD., Yongin-si (KR)
Filed on Dec. 8, 2022, as Appl. No. 18/078,072.
Application 18/078,072 is a division of application No. 17/062,299, filed on Oct. 2, 2020, granted, now 11,552,149.
Claims priority of application No. 10-2020-0028437 (KR), filed on Mar. 6, 2020.
Prior Publication US 2023/0112253 A1, Apr. 13, 2023
Int. Cl. H01L 27/32 (2006.01); H10K 59/121 (2023.01); H01L 29/66 (2006.01); H01L 27/12 (2006.01); H01L 29/423 (2006.01); H01L 29/786 (2006.01); H01L 21/02 (2006.01); H10K 59/12 (2023.01)
CPC H10K 59/1213 (2023.02) [H10K 59/1216 (2023.02); H01L 21/02532 (2013.01); H01L 21/02592 (2013.01); H01L 21/02661 (2013.01); H01L 21/02675 (2013.01); H01L 27/1222 (2013.01); H01L 27/1255 (2013.01); H01L 27/1274 (2013.01); H01L 29/42384 (2013.01); H01L 29/6675 (2013.01); H01L 29/78645 (2013.01); H01L 29/78672 (2013.01); H01L 29/78696 (2013.01); H01L 2029/42388 (2013.01); H10K 59/1201 (2023.02)] 2 Claims
OG exemplary drawing
 
1. A manufacturing method of a light emitting display device, the manufacturing method comprising:
forming amorphous silicon on a substrate;
cleaning the amorphous silicon;
crystallizing the amorphous silicon by irradiating the amorphous silicon with a laser; and
plasma-treating a surface of a crystallized semiconductor with hydrogen;
forming a semiconductor layer by etching the crystallized semiconductor;
forming a first gate insulating film covering the semiconductor layer; and
forming a first gate conductor on the first gate insulating film,
wherein the first gate insulating film is defined by one of a single layer of a silicon oxide film and a double layer of a silicon nitride film and the silicon oxide film,
wherein the first gate insulating film has a thickness value in a range of 800 Å to 1200 Å,
wherein the thickness value of the first gate insulating film is a thickness of the single layer of the silicon oxide film or a converted thickness of the double layer of the silicon nitride film and the silicon oxide film to the thickness of the single layer of the silicon oxide film, and
wherein a length of a channel of a transistor defined by a portion of the semiconductor layer is in a range of 1 μm to 2.5 μm.