US 11,871,556 B2
Memory device
Il Do Kim, Gyeonggi-do (KR); Dong Sun Sheen, Gyeonggi-do (KR); and Seung Hwan Kim, Gyeonggi-do (KR)
Assigned to SK hynix Inc., Gyeonggi-do (KR)
Filed by SK hynix Inc., Gyeonggi-do (KR)
Filed on Jan. 26, 2021, as Appl. No. 17/158,756.
Claims priority of application No. 10-2020-0080872 (KR), filed on Jul. 1, 2020.
Prior Publication US 2022/0005809 A1, Jan. 6, 2022
Int. Cl. H10B 12/00 (2023.01); H01L 27/12 (2006.01); H01L 29/06 (2006.01); H01L 29/786 (2006.01); H01L 29/423 (2006.01); H01L 29/76 (2006.01); H01L 29/775 (2006.01); H01L 29/24 (2006.01)
CPC H10B 12/30 (2023.02) [H01L 27/124 (2013.01); H01L 27/1225 (2013.01); H01L 27/1255 (2013.01); H01L 29/0673 (2013.01); H01L 29/24 (2013.01); H01L 29/42392 (2013.01); H01L 29/7606 (2013.01); H01L 29/775 (2013.01); H01L 29/7869 (2013.01); H01L 29/78672 (2013.01); H01L 29/78696 (2013.01); H10B 12/03 (2023.02); H10B 12/05 (2023.02); H10B 12/482 (2023.02); H10B 12/488 (2023.02); H10B 12/50 (2023.02)] 15 Claims
OG exemplary drawing
 
8. A memory device, comprising:
a plurality of cylindrical active layers including channel layers that are laterally spaced apart from a substrate in a first direction;
a word line extending in a second direction while surrounding the channel layers of the cylindrical active layers;
a bit line coupled to one side of the active layer and vertically oriented in a third direction from the substrate; and
a capacitor coupled to another side of the active layer,
wherein the word line includes:
an upper level portion positioned at a higher level than the channel layers;
a lower level portion positioned at a lower level than the channel layers; and
an intermediate level connection positioned between the upper level portion and the lower level portion while being positioned at the same level as the channel layers, and
wherein each of the cylindrical active layers includes:
an inner gap;
a gap-fill material filling the inner gap;
a first source/drain region surrounding an end of one side of the gap-fill material; and
a second source/drain region surrounding an end of another side of the gap-fill material,
wherein the channel layer includes a plurality of outer sides surrounding the gap-fill material.