CPC H04L 25/03 (2013.01) [H03L 7/0807 (2013.01); H03L 7/089 (2013.01); H03M 1/12 (2013.01); H04L 7/0087 (2013.01); H04L 25/03057 (2013.01); H04L 25/4917 (2013.01)] | 20 Claims |
1. A semiconductor integrated circuit comprising:
a converter configured to convert an analog signal into a digital signal based on a clock signal;
a comparator configured to determine first data having data of a first number of bits per symbol and second data having data of a second number of bits, less than the first number, per symbol based on the digital signal;
a recovery circuit configured to recover the clock signal; and
a control circuit configured to input the digital signal and the first data to the recovery circuit in a case where a condition is not satisfied, and to input the digital signal and the second data to the recovery circuit in a case where the condition is satisfied.
|