US 11,870,570 B2
Signal receiving device including sampler, voting circuit, and eye open monitor circuit
Young San Kang, Yongin-si (KR); Byoung Sul Kim, Suwon-si (KR); Soo-Hyung Kim, Hwaseong-si (KR); and Jun-Ho Jo, Hwaseong-si (KR)
Assigned to SAMSUNG ELECTRONICS CO., LTD., Suwon-si (KR)
Filed by Samsung Electronics Co., Ltd., Suwon-si (KR)
Filed on Jan. 22, 2022, as Appl. No. 17/581,876.
Claims priority of application No. 10-2021-0077333 (KR), filed on Jun. 15, 2021.
Prior Publication US 2022/0399955 A1, Dec. 15, 2022
Int. Cl. H04L 1/00 (2006.01); G11C 7/22 (2006.01); H04L 1/16 (2023.01); G11C 7/14 (2006.01); H04L 1/1607 (2023.01)
CPC H04L 1/0042 (2013.01) [G11C 7/14 (2013.01); G11C 7/22 (2013.01); H04L 1/0045 (2013.01); H04L 1/1678 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A signal receiving device comprising:
a sampling device configured to sample an input signal to output a plurality of sampling values; and
an output circuit configured to output data based on the plurality of sampling values,
wherein the output circuit is configured to:
output the data by performing majority voting based on first to third sampling values of the plurality of sampling values in response to a first control signal, and
output the data and first and second error count signals based on the first sampling value and fourth and fifth sampling values of the plurality of sampling values in response to a second control signal,
wherein the first error count signal is generated by comparing the first sampling value sampled under a reference condition with the fourth sampling value sampled under a first offset condition, and
wherein the second error count signal is generated by comparing the first sampling value with the fifth sampling value sampled under a second offset condition different from the first offset condition.