US 11,869,571 B2
Memory device, a controller for controlling the same, a memory system including the same, and a method of operating the same
Youngcheon Kwon, Hwaseong-si (KR); Jaeyoun Youn, Seoul (KR); Namsung Kim, Yongin-si (KR); Kyomin Sohn, Yongin-si (KR); Seongil O, Suwon-si (KR); and Sukhan Lee, Seoul (KR)
Assigned to SAMSUNG ELECTRONICS CO., LTD., Suwon-si (KR)
Filed by SAMSUNG ELECTRONICS CO., LTD., Suwon-si (KR)
Filed on Aug. 30, 2022, as Appl. No. 17/899,141.
Application 17/899,141 is a continuation of application No. 17/239,854, filed on Apr. 26, 2021, granted, now 11,462,255.
Claims priority of application No. 10-2020-0112495 (KR), filed on Sep. 3, 2020.
Prior Publication US 2022/0406369 A1, Dec. 22, 2022
Int. Cl. G11C 11/406 (2006.01); G11C 11/408 (2006.01); G11C 7/10 (2006.01); G11C 11/4076 (2006.01)
CPC G11C 11/40618 (2013.01) [G11C 7/1045 (2013.01); G11C 7/1048 (2013.01); G11C 11/408 (2013.01); G11C 11/4076 (2013.01); G11C 11/40622 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A controller for controlling a memory device, the controller comprising:
a clock generator configured to generate a clock signal and to output the clock signal to the memory device;
a command address generator configured to generate a command and address signal to operate the memory device;
a command address transmitter configured to transmit the command and address signal in response to the clock signal; and
a processing-in-memory (PIM) mode generator configured to generate a mode change command for selecting one of a first operation mode and a second operation mode,
wherein one bank among a plurality of banks of the memory device is activated in response to the mode change command indicating the first operation mode, and
at least two banks among the plurality of banks of the memory device are activated in response to the mode change command indicating the second operation mode.