US 11,869,566 B2
Memory cell based on self-assembled monolayer polaron
Elad Mentovich, Tel Aviv (IL); and Itshak Kalifa, Bat Yam (IL)
Assigned to MELLANOX TECHNOLOGIES, LTD., Yokneam (IL)
Filed by MELLANOX TECHNOLOGIES, LTD., Yokneam (IL)
Filed on Aug. 5, 2021, as Appl. No. 17/394,515.
Prior Publication US 2023/0041969 A1, Feb. 9, 2023
Int. Cl. G11C 11/40 (2006.01); G11C 11/404 (2006.01); G11C 11/4096 (2006.01); H10K 10/46 (2023.01); H10K 85/20 (2023.01)
CPC G11C 11/404 (2013.01) [G11C 11/4096 (2013.01); H10K 10/484 (2023.02); H10K 10/491 (2023.02); H10K 85/211 (2023.02)] 28 Claims
OG exemplary drawing
 
1. A memory device, comprising:
a memory cell, comprising:
an array of one or more molecule chains, at least one of the molecule chains comprising: (i) first and second binding sites positioned at first and second ends of the molecule chain, respectively, and (ii) a chain of one or more fullerene derivatives, chemically connecting between the first and second binding sites;
a source electrode and a drain electrode, which are electrically connected to the first and second binding sites, respectively, and are configured to apply to the array a source-drain voltage (VSD) along a first axis; and
a gate electrode, which is configured to apply to the array a gate voltage (VG) along a second axis, different from the first axis; and
a controller, which is configured to perform a data storage operation in the memory cell by (i) applying to the gate electrode a signal for producing the VG, and (ii) applying the VSD between the source and drain electrodes.