US 11,868,658 B2
Memory controller including first processor for generating commands and second processor for generating logging information and method of operating the memory controller
Dong Hwan Kim, Icheon (KR)
Assigned to SK hynix Inc., Icheon (KR)
Filed by SK hynix Inc., Icheon (KR)
Filed on Dec. 6, 2021, as Appl. No. 17/542,860.
Claims priority of application No. 10-2021-0077466 (KR), filed on Jun. 15, 2021.
Prior Publication US 2022/0398041 A1, Dec. 15, 2022
Int. Cl. G06F 3/06 (2006.01)
CPC G06F 3/0659 (2013.01) [G06F 3/0604 (2013.01); G06F 3/0634 (2013.01); G06F 3/0653 (2013.01); G06F 3/0673 (2013.01)] 18 Claims
OG exemplary drawing
 
1. A memory controller configured to control a memory device, the memory controller comprising:
a first processor configured to generate a command corresponding to a request received from a host, and translate a logical address included in the request into a physical address of the memory device; and
a second processor configured to operate on data to be output to the memory device or on data received from the memory device,
wherein if the request is received from the host when the second processor is in an idle state, the first processor controls the second processor to:
release the idle state of the second processor, and
perform an operation of logging command information corresponding to the request,
wherein the second processor outputs logging information by logging the command information, to the first processor, and
wherein the first processor stores the logging information in a log area.