US 11,868,657 B2
Memory controller, method of operating the memory controller, and electronic device including the memory controller
Hyunsoo Kim, Bucheon-si (KR); Seungwon Lee, Hwaseong-si (KR); Seungwoo Seo, Incheon (KR); and Hosang Yoon, Yongin-si (KR)
Assigned to Samsung Electronics Co., Ltd., Suwon-si (KR)
Filed by SAMSUNG ELECTRONICS CO., LTD., Suwon-si (KR)
Filed on Sep. 13, 2021, as Appl. No. 17/472,990.
Claims priority of application No. 10-2021-0017675 (KR), filed on Feb. 8, 2021; and application No. 10-2021-0061304 (KR), filed on May 12, 2021.
Prior Publication US 2022/0253247 A1, Aug. 11, 2022
Int. Cl. G06F 3/06 (2006.01)
CPC G06F 3/0659 (2013.01) [G06F 3/0604 (2013.01); G06F 3/0679 (2013.01)] 19 Claims
OG exemplary drawing
 
1. A method of operating a memory controller, comprising:
receiving, from a host core, a plurality of commands for a memory;
depending on a result of verification that a command, from among the plurality of commands, being verified as a write command, based on determining if a portion of data stored in a data field of the write command matches a preset identification previously stored in the memory controller, identifying, from among the plurality of commands, processing in memory (PIM) commands to execute one or more operations in the memory;
verifying ordering information from a data field in each of the PIM commands; and
reordering the PIM commands based on the ordering information and transmitting the reordered PIM commands to the memory.