CPC G06F 3/0659 (2013.01) [G06F 3/0604 (2013.01); G06F 3/0679 (2013.01)] | 19 Claims |
1. A method of operating a memory controller, comprising:
receiving, from a host core, a plurality of commands for a memory;
depending on a result of verification that a command, from among the plurality of commands, being verified as a write command, based on determining if a portion of data stored in a data field of the write command matches a preset identification previously stored in the memory controller, identifying, from among the plurality of commands, processing in memory (PIM) commands to execute one or more operations in the memory;
verifying ordering information from a data field in each of the PIM commands; and
reordering the PIM commands based on the ordering information and transmitting the reordered PIM commands to the memory.
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