CPC G06F 3/0655 (2013.01) [G06F 3/0604 (2013.01); G06F 3/0679 (2013.01); G11C 11/406 (2013.01); G11C 11/4082 (2013.01); G11C 11/4096 (2013.01); G11C 2211/4062 (2013.01)] | 20 Claims |
1. An apparatus, comprising:
a first memory circuit having a first set of performance measures that include at least a first type and a second type, wherein the first memory circuit is configured to increase the first type of performance measure;
a second memory circuit having a second set of performance measures that include the first type and the second type, wherein the second memory circuit is configured to increase the second type of performance measure:
a shared interface connected to the first and second memory circuits, wherein the shared interface provides a common input, a common output, or both for the first and second memory circuits; and
a selection interface configured to select between the first memory circuit and the second memory circuit to perform a memory operation.
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