US 11,868,475 B1
System and methods for latency reduction for fuse reload post reset
Ramacharan Sundararaman, San Jose, CA (US); Nithyananda Miyar, San Jose, CA (US); Martin Kovac, Newmarket (CA); Avinash Sodani, San Jose, CA (US); and Raghuveer Shivaraj, San Jose, CA (US)
Assigned to Marvell Asia Pte Ltd, Singapore (SG)
Filed by Marvell Asia Pte, Ltd., Singapore (SG)
Filed on Oct. 31, 2020, as Appl. No. 17/086,371.
Claims priority of provisional application 63/020,678, filed on May 6, 2020.
Int. Cl. G06F 21/57 (2013.01); G06F 9/4401 (2018.01)
CPC G06F 21/575 (2013.01) [G06F 9/4401 (2013.01)] 25 Claims
OG exemplary drawing
 
1. A system to support post reset fuse reload, comprising:
a one-time programmable fuse component comprising a plurality of fuses, wherein each fuse of the plurality of fuses is a functional block configured to maintain a value programmed into the each fuse during fabrication and/or hardware reset of an electronic device;
one or more load registers on the electronic device, wherein the one or more load registers are configured to store the values loaded from the one-time programmable fuse component subsequent to the one-time programmable fuse component being programmed during fabrication and/or hardware reset, wherein the values are accessible through the one or more load registers by other components of the electronic device; and
a finite state machine (FSM) configured to
read the values from the plurality of fuses in the fuse component;
load the values of the plurality of fuses in the fuse component into the one or more load registers;
set a valid indicator on the one or more load registers to indicate whether the values stored in the one or more load registers are valid and can be read or accessed by the other components of the electronic device; and
enable the other components of the electronic device to access the values loaded into the one or more load registers.