CPC G06F 13/4243 (2013.01) [G06F 13/374 (2013.01); H04L 12/40019 (2013.01); H04L 12/40032 (2013.01); H04L 12/42 (2013.01)] | 12 Claims |
1. A bus system, the bus system comprising:
at least two data bus subscribers, including a first data bus subscriber and a second data bus subscriber;
at least two hardware base elements connected to each other, including a first base element and a second base element, the at least two hardware base elements forming a communication infrastructure for the bus system;
at least two processors, including a first processor in the first data bus subscriber and a second processor in the second data bus subscriber;
at least two switches, the at least two switches controlling bus communication to the at least two processors and controlling a bypass of one or more of the at least two data bus subscribers,
wherein each of the at least two data bus subscribers are configured to connect to a respective hardware base element of the at least two hardware base elements,
wherein the at least two switches are disposed in the at least two hardware base elements,
wherein the first data bus subscriber is physically connected to the first base element and the second data bus subscriber is physically connected to the second base element,
wherein the first base element and the second base element are electrically connected such that the first data bus subscriber and the second data bus subscriber are adapted to communicate via the first base element and the second base element, and
wherein the communication infrastructure between the at least two hardware base elements including the first base element and the second base element includes an uplink and a downlink.
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