CPC G06F 12/0877 (2013.01) [G06F 12/0802 (2013.01); G06F 12/0806 (2013.01); G06F 12/0848 (2013.01); G06F 12/0855 (2013.01); G06F 12/0868 (2013.01); G06F 12/126 (2013.01); G06T 1/60 (2013.01); G06F 12/0893 (2013.01)] | 20 Claims |
1. A general-purpose graphics processor comprising:
a memory interface;
a cache memory communicatively coupled with the memory interface;
a processing resource communicatively coupled with the memory interface and the cache memory, the processing resource to perform a general-purpose compute operation; and circuitry communicatively coupled with the cache memory and the memory interface, the circuitry to:
compress compute data at cache sector granularity, the cache sector granularity is a sub-block granularity, said compress compute data including compress multiple cache lines of the compute data associated with a sector before a write of the compressed compute data associated with the sector via the memory interface,
in association with a read of the compressed compute data associated with the multiple cache lines via the memory interface, decompress the compressed compute data to generate decompressed compute data, and
provide the decompressed compute data to the processing resource for performance of the general-purpose compute operation.
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