US 10,892,405 B2
Hall-effect sensor package with added current path
Ming Li, Plano, TX (US); Yiqi Tang, Allen, TX (US); Jie Chen, Dallas, TX (US); Enis Tuncer, Dallas, TX (US); Usman Mahmood Chaudhry, McKinney, TX (US); Tony Ray Larson, Tucson, AZ (US); Rajen Manicon Murugan, Dallas, TX (US); John Paul Tellkamp, Rockwall, TX (US); and Satyendra Singh Chauhan, Murphy, TX (US)
Assigned to TEXAS INSTRUMENTS INCORPORATED, Dallas, TX (US)
Filed by Texas Instruments Incorporated, Dallas, TX (US)
Filed on May 7, 2019, as Appl. No. 16/404,978.
Prior Publication US 2020/0357987 A1, Nov. 12, 2020
Int. Cl. H01L 43/04 (2006.01); H01L 43/06 (2006.01); H01L 43/14 (2006.01); G01R 15/20 (2006.01); H01L 23/495 (2006.01); G01R 33/07 (2006.01); G01R 33/00 (2006.01)
CPC H01L 43/14 (2013.01) [G01R 15/202 (2013.01); G01R 33/07 (2013.01); H01L 23/49548 (2013.01); H01L 43/065 (2013.01); G01R 33/0052 (2013.01)] 21 Claims
OG exemplary drawing
 
1. A Hall-effect sensor package, comprising:
an integrated circuit (IC) die including at least one Hall-effect sensor element and signal processing circuitry including at least an amplifier coupled to an output node of the Hall-effect element;
a leadframe including:
a plurality of leads including a first plurality of leads on a first side of the package providing a first field generating current (FGC) path including at least one first FGC input pin coupled by a reduced width first curved head over or under the Hall-effect sensor element to at least one first FGC output pin and a second plurality of leads on a second side of the package that is opposite to the first side;
wherein at least some of the plurality of leads on the second side are attached to bond pads on the IC die including to an output of the Hall-effect sensor element, and
a clip attached at one end to a location on the first FGC input pin and at another end to a location on the first FGC output pin with a reduced width second curved head in between that is over or under the Hall-effect sensor element opposite the first curved head for providing a parallel FGC path with respect to the first FGC path.