US 10,892,364 B2
Dielectric isolated fin with improved fin profile
Kangguo Cheng, Schenectady, NY (US); Bruce B. Doris, Brewster, NY (US); Darsen D. Lu, Mount Kisco, NY (US); Ali Khakifirooz, Los Altos, CA (US); and Kern Rim, Yorktown Heights, NY (US)
Assigned to INTERNATIONAL BUSINESS MACHINES CORPORATION, Armonk, NY (US)
Filed by INTERNATIONAL BUSINESS MACHINES CORPORATION, Armonk, NY (US)
Filed on Nov. 1, 2017, as Appl. No. 15/800,740.
Application 15/800,740 is a division of application No. 15/134,960, filed on Apr. 21, 2016, granted, now 10,546,955.
Application 15/134,960 is a continuation of application No. 14/189,294, filed on Feb. 25, 2014, granted, now 9,548,213, issued on Jan. 17, 2017.
Prior Publication US 2018/0122944 A1, May 3, 2018
Int. Cl. H01L 29/772 (2006.01); H01L 29/78 (2006.01); H01L 29/66 (2006.01); H01L 21/311 (2006.01); H01L 21/308 (2006.01); H01L 21/306 (2006.01); H01L 21/324 (2006.01); H01L 29/10 (2006.01); H01L 21/02 (2006.01); H01L 21/3105 (2006.01); H01L 21/762 (2006.01); H01L 29/06 (2006.01)
CPC H01L 29/7846 (2013.01) [H01L 21/02236 (2013.01); H01L 21/3086 (2013.01); H01L 21/30604 (2013.01); H01L 21/311 (2013.01); H01L 21/31051 (2013.01); H01L 21/31111 (2013.01); H01L 21/324 (2013.01); H01L 21/76224 (2013.01); H01L 29/0653 (2013.01); H01L 29/1054 (2013.01); H01L 29/6653 (2013.01); H01L 29/6656 (2013.01); H01L 29/66553 (2013.01); H01L 29/66795 (2013.01); H01L 29/785 (2013.01); H01L 29/7851 (2013.01)] 13 Claims
OG exemplary drawing
 
1. A fin field effect transistor (finFET) comprising:
a semiconductor portion of a fin structure that is present on a dielectric base portion of the fin structure, wherein at least two peak uniform tail region portions each having a triangular cross section that are present at an interface of the semiconductor portion of the fin structure and the dielectric base portion of the fin structure one of each of the at least two peak uniform tail regions portions on opposing sidewalls of the fin structure, the at least two peak uniform tail regions connected by a centrally positioned planar upper surface of the dielectric base portion of the fin structure;
a gate structure present on a portion of the fin structure including a gate dielectric in contact with a channel portion of the fin structure; and
a source region and a drain region on opposing sides of the channel portion of the fin structure.