US 10,892,326 B2
Removal of a bottom-most nanowire from a nanowire device stack
Aaron Lilak, Beaverton, OR (US); Patrick Keys, Portland, OR (US); Sean Ma, Portland, OR (US); Stephen Cea, Hillsboro, OR (US); and Rishabh Mehandru, Portland, OR (US)
Assigned to Intel Corporation, Santa Clara, CA (US)
Appl. No. 16/475,031
Filed by Intel Corporation, Santa Clara, CA (US)
PCT Filed Mar. 30, 2017, PCT No. PCT/US2017/025207
§ 371(c)(1), (2) Date Jun. 28, 2019,
PCT Pub. No. WO2018/182655, PCT Pub. Date Oct. 4, 2018.
Prior Publication US 2019/0333990 A1, Oct. 31, 2019
Int. Cl. H01L 21/306 (2006.01); H01L 21/3105 (2006.01); H01L 21/56 (2006.01); H01L 21/78 (2006.01); H01L 23/31 (2006.01); H01L 27/088 (2006.01); H01L 29/78 (2006.01); H01L 29/06 (2006.01); H01L 29/08 (2006.01); H01L 29/10 (2006.01); H01L 29/40 (2006.01); H01L 29/423 (2006.01); H01L 29/66 (2006.01)
CPC H01L 29/0673 (2013.01) [H01L 21/30604 (2013.01); H01L 21/31053 (2013.01); H01L 21/568 (2013.01); H01L 21/7806 (2013.01); H01L 23/3107 (2013.01); H01L 27/0886 (2013.01); H01L 29/0847 (2013.01); H01L 29/1037 (2013.01); H01L 29/401 (2013.01); H01L 29/42392 (2013.01); H01L 29/66795 (2013.01); H01L 29/785 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A method comprising:
forming a substrate;
forming a stack of nanowires, the stack of nanowires comprising an attached nanowire that is attached to the substrate, and one or more nanowires that are not attached to the substrate;
forming a gate stack, wherein the gate stack fully encircles at least a corresponding section of each nanowire of the one or more nanowires, and partially encircles the attached nanowire; and
removing the attached nanowire that is attached to the substrate, without removing any nanowire of the one or more nanowires.