US 10,892,323 B2
Semiconductor structure and manufacturing method thereof
Huang-Nan Chen, Taichung (TW); and Ming-Chih Hsu, Taichung (TW)
Assigned to Winbond Electronics Corp., Taichung (TW)
Filed by Winbond Electronics Corp., Taichung (TW)
Filed on May 22, 2019, as Appl. No. 16/419,021.
Prior Publication US 2020/0373386 A1, Nov. 26, 2020
Int. Cl. H01L 29/76 (2006.01); H01L 29/94 (2006.01); H01L 31/062 (2012.01); H01L 29/06 (2006.01); H01L 21/033 (2006.01); H01L 21/762 (2006.01); H01L 27/108 (2006.01)
CPC H01L 29/0653 (2013.01) [H01L 21/0337 (2013.01); H01L 21/762 (2013.01); H01L 27/10823 (2013.01); H01L 27/10891 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A buried word line structure, comprising:
a substrate;
an isolation structure located in the substrate to define active regions separated from each other, wherein the active regions extend in a first direction; and
a buried word line located in the substrate and extending through the isolation structure and the active regions in a second direction, wherein the first direction intersects the second direction, the buried word line and the substrate are isolated from each other, and
the same word line comprises a first portion and a second portion, wherein the first portion is located in the active regions, the second portion is located in the isolation structure between two adjacent active regions in the first direction, and a width of the first portion is greater than a width of the second portion.