US 10,892,274 B2
Three-dimensional memory devices and fabricating methods thereof
Yushi Hu, Hubei (CN); Qian Tao, Hubei (CN); Haohao Yang, Hubei (CN); Jin Wen Dong, Hubei (CN); Jun Chen, Hubei (CN); and Zhenyu Lu, Hubei (CN)
Assigned to Yangtze Memory Technologies Co., Ltd., Hubei (CN)
Filed by Yangtze Memory Technologies Co., Ltd., Hubei (CN)
Filed on Oct. 17, 2018, as Appl. No. 16/163,265.
Application 16/163,265 is a continuation of application No. PCT/CN2018/104457, filed on Sep. 7, 2018.
Claims priority of application No. 2017 1 1098604 (CN), filed on Nov. 9, 2017.
Prior Publication US 2019/0139982 A1, May 9, 2019
Int. Cl. H01L 27/11582 (2017.01); H01L 27/1157 (2017.01)
CPC H01L 27/11582 (2013.01) [H01L 27/1157 (2013.01)] 13 Claims
OG exemplary drawing
 
1. A method for forming a three-dimensional (3D) memory device, comprising:
forming an alternating dielectric stack on a substrate;
forming a channel hole penetrating the alternating dielectric stack to expose a surface of the substrate;
forming an epitaxial layer on a bottom of the channel hole;
forming a functional layer covering a sidewall of the channel hole and a top surface of the epitaxial layer;
forming a protecting layer covering the functional layer on the sidewall and the bottom of the channel hole;
removing portions of the functional layer and the protecting layer on the top surface of the epitaxial layer to form an opening to expose a surface of the epitaxial layer;
expanding the opening laterally, by removing portions of the functional layer on the top surface of the epitaxial layer and the protecting layer on the sidewall of the channel hole, to increase an exposed area of the epitaxial layer at the bottom of the channel hole, wherein an axial section of the remaining protecting layer includes two L-shaped portions; and
forming a channel structure on the sidewall of the channel hole and being in electrical contact with the epitaxial layer through the expanded opening.