US 10,892,260 B2
Capacitor
Ping-Liang Chen, Tainan (TW); Chao-Liang Chien, Tainan (TW); and Shih-Yi Tang, Tainan (TW)
Assigned to HIMAX TECHNOLOGIES LIMITED, Tainan (TW)
Filed by HIMAX TECHNOLOGIES LIMITED, Tainan (TW)
Filed on Mar. 6, 2019, as Appl. No. 16/293,638.
Prior Publication US 2020/0286885 A1, Sep. 10, 2020
Int. Cl. H01L 27/06 (2006.01); H01L 27/24 (2006.01); H01L 49/02 (2006.01); H03K 17/687 (2006.01); H03K 19/00 (2006.01)
CPC H01L 27/0629 (2013.01) [H01L 27/2436 (2013.01); H01L 27/2463 (2013.01); H01L 28/40 (2013.01); H03K 17/6872 (2013.01); H03K 19/0027 (2013.01)] 12 Claims
OG exemplary drawing
 
1. A capacitor comprising:
a first transistor having a first terminal used to couple to a first terminal of the capacitor;
a second transistor having a first terminal used to couple to a second terminal of the capacitor; and
a control circuit coupled between the first transistor and the second transistor, wherein the control circuit comprises:
a first switch having a first terminal used to couple to a first voltage, wherein a second terminal of the first switch is coupled to a control terminal of the first transistor, and when the first switch is turned on, the first voltage turns off the first transistor;
a second switch having a first terminal used to couple to a second voltage, wherein a second terminal of the second switch is coupled to a control terminal of the second transistor, and when the second switch is turned on, the second voltage turns off the second transistor;
a third switch having a first terminal used to couple to the second voltage, wherein a second terminal of the third switch is coupled to the control terminal of the first transistor; and
a fourth switch having a first terminal used to couple to the first voltage, wherein a second terminal of the fourth switch is coupled to the control terminal of the second transistor,
wherein in a power saving mode, the control circuit turns off the first transistor and the second transistor; and
wherein in a normal mode, the control circuit turns on the first transistor and the second transistor, a second terminal of the second transistor is coupled to the control terminal of the first transistor through the control circuit, and the control terminal of the second transistor is coupled to a second terminal of the first transistor through the control circuit.