US 10,892,244 B2
Apparatus and method for securing substrates with varying coefficients of thermal expansion
Jean-Philippe Fricker, Los Altos, CA (US)
Assigned to Cerebras Systems Inc., Los Altos, CA (US)
Filed by Cerebras Systems Inc., Los Altos, CA (US)
Filed on Apr. 28, 2020, as Appl. No. 16/860,985.
Application 16/860,985 is a continuation of application No. 16/583,725, filed on Sep. 26, 2019, granted, now 10,672,732.
Application 16/583,725 is a continuation of application No. 16/029,207, filed on Jul. 6, 2018, granted, now 10,468,369, issued on Nov. 5, 2019.
Claims priority of provisional application 62/536,071, filed on Jul. 24, 2017.
Prior Publication US 2020/0258860 A1, Aug. 13, 2020
This patent is subject to a terminal disclaimer.
Int. Cl. H01L 23/00 (2006.01); H01L 23/538 (2006.01); H01L 25/065 (2006.01)
CPC H01L 24/32 (2013.01) [H01L 23/5386 (2013.01); H01L 23/562 (2013.01); H01L 24/29 (2013.01); H01L 24/72 (2013.01); H01L 24/83 (2013.01); H01L 25/0655 (2013.01); H01L 2224/29186 (2013.01); H01L 2224/32225 (2013.01); H01L 2224/831 (2013.01); H01L 2924/15192 (2013.01); H01L 2924/351 (2013.01)] 22 Claims
OG exemplary drawing
 
1. An integrated circuit board assembly comprising:
a printed circuit board (PCB) comprising a first plurality of conducting pads arranged on a first surface of the PCB;
an integrated circuit wafer comprising a second plurality of conducting pads arranged on a second surface of the integrated circuit wafer; and
a compliant connector directly connected to the first surface and the second surface and connecting the first plurality of conducting pads to the second plurality of conducting pads, the compliant connector loaded with a mechanical stress that dynamically changes based on a thermal expansion mismatch between the PCB and integrated circuit wafer, wherein the compliant connector forms an arcuate electrical pathway of varying radii between one or more of the first plurality and one or more of the second plurality of conducting pads.