US 10,892,029 B1
Self-adaptive read voltage adjustment using directional error statistics for memories with time-varying error rates
Tingjun Xie, Milpitas, CA (US); and Zhengang Chen, San Jose, CA (US)
Assigned to Micron Technology, Inc., Boise, ID (US)
Filed by Micron Technology, Inc., Boise, ID (US)
Filed on Jul. 12, 2019, as Appl. No. 16/510,454.
Int. Cl. G11C 29/00 (2006.01); G11C 29/50 (2006.01); G06F 11/30 (2006.01)
CPC G11C 29/50004 (2013.01) [G06F 11/3037 (2013.01); G11C 29/50012 (2013.01); G11C 2029/5004 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A system comprising:
a memory component; and
a processing device, operatively coupled with the memory component, to:
identify a first range of a plurality of write-to-read delay ranges for the memory component, wherein the first range represents a plurality of write-to-read delay times and has an associated read voltage level used to perform a read operation on a segment of the memory component having a write-to-read delay time that falls within the first range;
identify a first set of the plurality of write-to-read delay times at a first end of the first range;
determine a first directional error rate for the memory component corresponding to the first set of the plurality of write-to-read delay times and a second directional error rate for the memory component corresponding to the first set of the plurality of write-to-read delay times;
determine whether a correspondence between the first directional error rate and the second directional error rate satisfies a first threshold criterion; and
responsive to the correspondence between the first directional error rate and the second directional error rate not satisfying the first threshold criterion, modify the read voltage level associated with the first range.