US 10,891,369 B2
Dynamic switching between pointer authentication regimes
Bernard J. Semeria, Palo Alto, CA (US); Devon S. Andrade, Santa Clara, CA (US); Jeremy C. Andrus, Sunnyvale, CA (US); Ahmed Bougacha, San Jose, CA (US); Peter Cooper, San Jose, CA (US); Jacques Fortier, San Francisco, CA (US); Louis G. Gerbarg, San Francisco, CA (US); James H. Grosbach, San Jose, CA (US); Robert J. McCall, New York, NY (US); Daniel A. Steffen, San Francisco, CA (US); and Justin R. Unger, San Jose, CA (US)
Assigned to Apple Inc., Cupertino, CA (US)
Filed by Apple Inc., Cupertino, CA (US)
Filed on Oct. 25, 2019, as Appl. No. 16/664,714.
Application 16/664,714 is a continuation of application No. 16/539,356, filed on Aug. 13, 2019.
Claims priority of provisional application 62/729,958, filed on Sep. 11, 2018.
Prior Publication US 2020/0082069 A1, Mar. 12, 2020
Int. Cl. G06F 21/44 (2013.01); H04L 9/32 (2006.01); G06F 15/78 (2006.01)
CPC G06F 21/44 (2013.01) [G06F 15/7807 (2013.01); H04L 9/3236 (2013.01); H04L 9/3247 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A system comprising:
a memory to store data and instructions; and
a processor coupled to the memory, the processor including an execution core, wherein the execution core is switchable between a first mode and a second mode, wherein in the first mode the execution core is to authenticate a memory address, via a signature associated with the memory address, before execution of an instruction associated with the memory address, in the second mode the execution core is to bypass authentication of the memory address for a process without support for pointer authentication, and the processor is to switch between the first mode and the second mode in response to execution of an instruction fetched from the memory, wherein the instruction causes the processor to disable a cryptographic key used to generate or authenticate the signature and wherein the processor is to switch to the second mode when the cryptographic key is disabled.