US 10,891,233 B2
Intelligent prefetch disk-caching technology
Scott Burridge, Hillsboro, OR (US); William Chiu, Houston, TX (US); Jawad Khan, Portland, OR (US); and Sanjeev Trika, Portland, OR (US)
Assigned to Intel Corporation, Santa Clara, CA (US)
Filed by Intel Corporation, Santa Clara, CA (US)
Filed on Jun. 28, 2018, as Appl. No. 16/21,677.
Prior Publication US 2019/0042441 A1, Feb. 7, 2019
Int. Cl. G06F 12/0866 (2016.01); G06F 12/0862 (2016.01)
CPC G06F 12/0866 (2013.01) [G06F 12/0862 (2013.01); G06F 2212/1024 (2013.01); G06F 2212/21 (2013.01); G06F 2212/214 (2013.01); G06F 2212/221 (2013.01); G06F 2212/281 (2013.01); G06F 2212/602 (2013.01); G06F 2212/6028 (2013.01)] 19 Claims
OG exemplary drawing
 
1. A computing system comprising:
a processor including a cache;
a storage device to store a file made up of a plurality of segments; and
a memory including a set of instructions, which when executed by the processor, cause the computing system to:
create a stack instance in response to a close operation,
populate the stack instance with one or more evicted memory locations,
identify a plurality of non-volatile memory locations associated with accesses to the file in response to the close operation with respect to the file, and
conduct a prefetch from one or more of the plurality of non-volatile memory locations that were in the cache and have been most recently accessed but are no longer in the cache and do not reference cached file segments based on a segment-by-segment threshold determination based on an amount of the accesses for individual segments of the plurality of segments, wherein the prefetch is conducted in response to an open operation with respect to the file and on a per-file segment basis, and wherein the prefetch is conducted from a top of the stack instance.