US 10,891,077 B2
Flash memory device and controlling method thereof
Hung-Sheng Chang, Taipei (TW); Hang-Ting Lue, Hsinchu (TW); and Yuan-Hao Chang, Taipai (TW)
Assigned to MACRONIX INTERNATIONAL CO., LTD., Hsinchu (TW)
Filed by MACRONIX INTERNATIONAL CO., LTD., Hsinchu (TW)
Filed on Dec. 26, 2018, as Appl. No. 16/232,119.
Prior Publication US 2020/0210102 A1, Jul. 2, 2020
Int. Cl. G06F 3/06 (2006.01)
CPC G06F 3/0659 (2013.01) [G06F 3/064 (2013.01); G06F 3/0611 (2013.01); G06F 3/0652 (2013.01); G06F 3/0679 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A flash memory device, comprising:
a memory array;
an in-place update module, used for performing a program procedure or a garbage collection procedure via a bit erase operation or a page erase operation on the memory array;
an out-of-place update module, used for performing the program procedure or the garbage collection procedure via a block erase operation or a migration operation on the memory array; and
a latency-aware module, used for determining a relationship between a first overhead of the in-place update module and a second overhead of the out-of-place update module.