US 12,193,339 B1
Integrated readout card
Theodore Charles White, Santa Barbara, CA (US); and John Martinis, Santa Barbara, CA (US)
Assigned to Google LLC, Mountain View, CA (US)
Filed by Google LLC, Mountain View, CA (US)
Filed on Aug. 8, 2022, as Appl. No. 17/883,156.
Application 17/883,156 is a continuation of application No. 17/104,826, filed on Nov. 25, 2020, granted, now 11,411,159.
Claims priority of provisional application 62/941,230, filed on Nov. 27, 2019.
This patent is subject to a terminal disclaimer.
Int. Cl. H05K 1/02 (2006.01); G06N 10/00 (2022.01); H01P 1/383 (2006.01); H01P 5/18 (2006.01); H03F 19/00 (2006.01); H10N 60/10 (2023.01); H10N 60/12 (2023.01); H10N 60/80 (2023.01); H10N 60/81 (2023.01); B82Y 10/00 (2011.01)
CPC H10N 60/815 (2023.02) [G06N 10/00 (2019.01); H01P 1/383 (2013.01); H01P 5/184 (2013.01); H03F 19/00 (2013.01); H05K 1/0209 (2013.01); H05K 1/0233 (2013.01); H10N 60/12 (2023.02); H10N 60/805 (2023.02); B82Y 10/00 (2013.01); H05K 2201/10022 (2013.01); H05K 2201/10045 (2013.01); H05K 2201/10068 (2013.01)] 20 Claims
OG exemplary drawing
 
1. An integrated qubit readout circuit board comprising:
a superconducting parametric amplifier mounting region; and
a circulator mounting region, wherein the circulator mounting region is electrically connected to the superconducting parametric amplifier mounting region; and
a termination resistor mounting region, wherein the circulator mounting region comprises a termination port electrically connected to the termination resistor mounting region.