| CPC H10K 59/352 (2023.02) [H10K 50/824 (2023.02); H10K 59/122 (2023.02); H10K 59/126 (2023.02)] | 10 Claims |
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1. A display device comprising:
a first base layer;
a circuit element layer on the first base layer;
a pixel definition layer on the circuit element layer and comprising a plurality of light-emitting openings which are spaced apart from each other and define a plurality of light-emitting regions;
a second base layer spaced apart from and facing the first base layer; and
a light-shielding layer on the second base layer and comprising a plurality of openings respectively overlapping the light-emitting regions,
a plurality of first electrodes on the circuit element layer and respectively having portions exposed by the light-emitting openings;
a light-emitting layer on the first electrodes; and
a second electrode on the pixel definition layer and covering the light-emitting layer,
wherein the circuit element layer comprises:
a plurality of transistors on the first base layer and electrically connected to the light-emitting layer; and
a dummy transistor on the first base layer and electrically connected to the second electrode via the through hole,
wherein on a plane of the first base layer, shapes of first to third openings along one direction among the openings are different from each other, and
wherein the pixel definition layer further comprises a through hole between the first to third openings and fourth to sixth openings, the through hole being aligned with the first through sixth openings along the one direction, and the fourth to sixth openings mirroring the first to third openings relative to the through hole.
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