CPC H10K 59/122 (2023.02) [H10K 59/80518 (2023.02); H10K 59/878 (2023.02)] | 15 Claims |
1. A display backplane, comprising:
a substrate;
a plurality of pixel units disposed on the substrate, the pixel units comprising reflection units; and
a barrier layer disposed on the substrate, wherein the barrier layer comprises a plurality of barriers disposed between two adjacent pixel units, and two adjacent reflection units are separately disposed by the barriers;
wherein the barrier layer comprises a barrier disposed in an interval between two adjacent pixel units;
wherein the barrier is spaced apart from two adjacent pixel units;
wherein the display backplane further comprises a pixel isolation column disposed between two adjacent pixel units;
wherein the barrier is located in the pixel isolation column.
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