US 12,193,261 B2
Display device having a sealing film covering a cathode
Akinori Kamiya, Tokyo (JP)
Assigned to Japan Display Inc., Tokyo (JP)
Filed by Japan Display Inc., Tokyo (JP)
Filed on Nov. 6, 2023, as Appl. No. 18/387,080.
Application 18/387,080 is a continuation of application No. 17/126,167, filed on Dec. 18, 2020, granted, now 11,849,599.
Application 17/126,167 is a continuation of application No. 16/872,648, filed on May 12, 2020, granted, now 10,903,449, issued on Jan. 26, 2021.
Application 16/872,648 is a continuation of application No. 16/431,075, filed on Jun. 4, 2019, granted, now 10,693,106, issued on Jun. 23, 2020.
Application 16/431,075 is a continuation of application No. 15/728,993, filed on Oct. 10, 2017, granted, now 10,367,167, issued on Jul. 30, 2019.
Application 15/728,993 is a continuation of application No. 15/335,525, filed on Oct. 27, 2016, granted, now 9,818,979, issued on Nov. 14, 2017.
Application 15/335,525 is a continuation of application No. 14/847,869, filed on Sep. 8, 2015, granted, now 9,515,289, issued on Dec. 6, 2016.
Application 14/847,869 is a continuation of application No. 14/210,907, filed on Mar. 14, 2014, granted, now 9,159,951, issued on Oct. 13, 2015.
Claims priority of application No. 2013-053469 (JP), filed on Mar. 15, 2013.
Prior Publication US 2024/0081095 A1, Mar. 7, 2024
Int. Cl. H10K 50/844 (2023.01); H10K 50/11 (2023.01); H10K 50/15 (2023.01); H10K 50/16 (2023.01); H10K 50/17 (2023.01); H10K 50/828 (2023.01); H10K 50/856 (2023.01); H10K 59/12 (2023.01); H10K 59/122 (2023.01); H10K 71/00 (2023.01); H10K 50/84 (2023.01); H10K 101/10 (2023.01)
CPC H10K 50/844 (2023.02) [H10K 50/11 (2023.02); H10K 50/15 (2023.02); H10K 50/16 (2023.02); H10K 50/17 (2023.02); H10K 50/171 (2023.02); H10K 50/828 (2023.02); H10K 50/856 (2023.02); H10K 59/12 (2023.02); H10K 59/122 (2023.02); H10K 71/00 (2023.02); H10K 50/84 (2023.02); H10K 2101/10 (2023.02)] 3 Claims
OG exemplary drawing
 
1. A display device comprising:
an insulating substrate;
a circuit layer disposed on the insulating substrate;
an anode disposed on the circuit layer;
a pixel isolation film formed on the anode;
an organic layer having light emitting element disposed on the pixel isolation film;
a cathode covering the organic layer; and
a sealing film covering the cathode,
wherein
the circuit layer includes a thin film transistor and a passivation film covering the thin film transistor,
the pixel isolation film covers an edge portion of the anode and has a contact hole exposing a part of the anode,
the organic layer is in contact with the anode through the contact hole,
the sealing film includes a first barrier layer, a base layer on the first barrier layer, an interlayer on the base layer, and a second barrier layer on the interlayer,
the first barrier layer includes silicon nitride or silicon oxynitride,
the base layer includes silicon oxide or amorphous silicon and is in contact with the first barrier layer,
the interlayer is made of organic material and is sandwiched between the base layer and the second barrier layer,
the second barrier layer includes silicon nitride or silicon oxynitride,
the base layer has a flat surface corresponding to an area where the organic layer is in contact with the anode and an inclined surface corresponding to the contact hole of the pixel isolation film,
the interlayer is disposed on a boundary portion between the flat surface and the inclined surface, and
the second barrier layer is in contact with the base layer at the flat surface within the contact hole.