US 12,193,238 B2
Semiconductor devices
Go Hyun Lee, Icheon-si (KR); and Sung Wook Jung, Icheon-si (KR)
Assigned to SK HYNIX INC., Icheon-si (KR)
Filed by SK hynix Inc., Icheon-si (KR)
Filed on Nov. 28, 2022, as Appl. No. 18/058,981.
Application 18/058,981 is a division of application No. 16/999,299, filed on Aug. 21, 2020, granted, now 11,538,821.
Claims priority of application No. 10-2020-0013092 (KR), filed on Feb. 4, 2020.
Prior Publication US 2023/0093758 A1, Mar. 23, 2023
Int. Cl. H01L 27/11575 (2017.01); H01L 23/522 (2006.01); H10B 41/10 (2023.01); H10B 41/27 (2023.01); H10B 41/35 (2023.01); H10B 41/50 (2023.01); H10B 43/10 (2023.01); H10B 43/27 (2023.01); H10B 43/35 (2023.01); H10B 43/50 (2023.01)
CPC H10B 43/50 (2023.02) [H01L 23/5226 (2013.01); H10B 41/10 (2023.02); H10B 41/27 (2023.02); H10B 41/35 (2023.02); H10B 41/50 (2023.02); H10B 43/10 (2023.02); H10B 43/27 (2023.02); H10B 43/35 (2023.02)] 9 Claims
OG exemplary drawing
 
1. A semiconductor device comprising:
a plurality of first slits disposed at a boundary region of contiguous memory blocks isolating the memory blocks from each other, and disposed to be spaced apart from each other by a predetermined distance in a first direction;
at least one word line disposed between the first slits disposed in a square shape;
at least one drain selection line disposed over the word line; and
a plurality of isolation patterns disposed to isolate each segment of the at least one drain selection line into units of a block,
wherein the at least one word line is integrated into a single structure.