US 12,193,235 B2
Nonvolatile memory device and apparatus including the same
Youngtek Oh, Suwon-si (KR); Hyeyoung Kwon, Hwaseong-si (KR); Taein Kim, Seoul (KR); Gukhyon Yon, Hwaseong-si (KR); and Minhyun Lee, Suwon-si (KR)
Assigned to Samsung Electronics Co., Ltd., Gyeonggi-do (KR)
Filed by Samsung Electronics Co., Ltd., Suwon-si (KR)
Filed on Nov. 30, 2021, as Appl. No. 17/537,984.
Claims priority of application No. 10-2021-0042894 (KR), filed on Apr. 1, 2021.
Prior Publication US 2022/0320135 A1, Oct. 6, 2022
Int. Cl. H10B 43/27 (2023.01)
CPC H10B 43/27 (2023.02) 21 Claims
OG exemplary drawing
 
1. A nonvolatile memory device comprising:
a channel layer extending in a first direction;
a plurality of gate electrodes and a plurality of separation layers spaced apart from the channel layer and alternately arranged in the first direction;
a plurality of charge trap layers between the plurality of gate electrodes and the channel layer; and
a plurality of charge blocking layers between the plurality of charge trap layers and the plurality of gate electrodes, wherein
the plurality of separation layers separate the plurality of charge trap layers from each other,
the plurality of separation layers separate the plurality of charge blocking layers from each other, and
each corresponding charge trap layer among the plurality of charge trap layers, corresponding charge blocking layer among the plurality of charge blocking layers, and corresponding gate electrode among the plurality of gate electrodes is in direct contact with a corresponding separation layer among the plurality of separation layers.