US 12,193,225 B2
Semiconductor device
Takatoshi Minamoto, Kamakura Kanagawa (JP); Sho Tokairin, Hiratsuka Kanagawa (JP); and Yoshinao Suzuki, Yokohama Kanagawa (JP)
Assigned to KIOXIA CORPORATION, Tokyo (JP)
Filed by Kioxia Corporation, Tokyo (JP)
Filed on Jul. 7, 2021, as Appl. No. 17/369,453.
Claims priority of application No. 2021-003038 (JP), filed on Jan. 12, 2021.
Prior Publication US 2022/0223611 A1, Jul. 14, 2022
Int. Cl. H01L 27/11556 (2017.01); G11C 5/02 (2006.01); H10B 41/27 (2023.01); H10B 43/27 (2023.01)
CPC H10B 41/27 (2023.02) [G11C 5/025 (2013.01); H10B 43/27 (2023.02)] 15 Claims
OG exemplary drawing
 
1. A semiconductor device comprising:
a first conductivity type semiconductor substrate;
a second conductivity type first impurity diffusion layer disposed in a surface region of the semiconductor substrate;
a first resistance element, including a first conductivity type second impurity diffusion layer and having an input portion, disposed in the second conductivity type first impurity diffusion layer;
a second resistance element, including a first conductivity type third impurity diffusion layer that is separated from the second conductivity type first impurity diffusion layer;
a transistor that is out from the second conductivity type first impurity diffusion layer and the first conductivity type third impurity diffusion layer including:
a gate connected to the input portion,
a source connected to the second conductivity type first impurity diffusion layer, and
a drain connected to a voltage source, the voltage source having a voltage higher than a voltage of the input portion; and
a current source connected to the source, wherein
the first resistance element and the second resistance element are in series between the input portion and an output portion, the output portion having a voltage lower than the voltage of the voltage source.