CPC H10B 12/315 (2023.02) [G11C 5/063 (2013.01); H10B 12/0335 (2023.02); H10B 12/056 (2023.02); H10B 12/36 (2023.02); H10B 12/482 (2023.02); H10B 12/488 (2023.02)] | 11 Claims |
1. A method for fabricating a semiconductor device, the method comprising:
preparing a plurality of stacked line structures including a bit line over a substrate and a line-type active layer over the bit line, wherein longest directions of the bit line and the line-type active layer extends in a first direction;
forming a plurality of island-type active layers by cutting the line-type active layer;
forming a first plug for electrically coupling the bit line to the island-type active layers, wherein a longest direction of the first plug extends in a second direction perpendicular to the first direction;
forming a word line over the island-type active layers;
forming a second plug which is coupled to both sides of each of the island-type active layers; and
forming a plurality of capacitors that are respectively coupled to the second plugs.
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