US 12,193,138 B2
Matchless plasma source for semiconductor wafer fabrication
Maolin Long, Santa Clara, CA (US); Yuhou Wang, Fremont, CA (US); Ricky Marsh, San Ramon, CA (US); and Alex Paterson, San Jose, CA (US)
Assigned to Lam Research Corporation, Fremont, CA (US)
Filed by Lam Research Corporation, Fremont, CA (US)
Filed on Jun. 23, 2023, as Appl. No. 18/340,437.
Application 18/340,437 is a continuation of application No. 17/558,332, filed on Dec. 21, 2021, granted, now 11,716,805.
Application 17/558,332 is a continuation of application No. 16/853,516, filed on Apr. 20, 2020, granted, now 11,224,116, issued on Jan. 11, 2022.
Application 16/853,516 is a continuation of application No. 16/356,180, filed on Mar. 18, 2019, granted, now 10,638,593, issued on Apr. 28, 2020.
Application 16/356,180 is a continuation of application No. 15/787,660, filed on Oct. 18, 2017, granted, now 10,264,663, issued on Apr. 16, 2019.
Prior Publication US 2023/0354502 A1, Nov. 2, 2023
Int. Cl. H01J 37/32 (2006.01); H03F 3/217 (2006.01); H05H 1/46 (2006.01)
CPC H05H 1/46 (2013.01) [H01J 37/32174 (2013.01); H01J 37/32183 (2013.01); H03F 3/2173 (2013.01); H05H 1/4652 (2021.05); H05H 1/466 (2021.05); H05H 2242/10 (2013.01); H05H 2242/24 (2021.05)] 14 Claims
OG exemplary drawing
 
1. A matchless plasma source comprising:
a signal generator configured to generate a square wave signal having a frequency;
a first gate driver coupled to the signal generator, wherein the first gate driver is configured to receive the square wave signal to output a first plurality of reversely synchronized signals having the same frequency as that of the square wave signal, wherein the first plurality of reversely synchronized signals include a first signal and a second signal;
a second gate driver coupled to the signal generator, wherein the second gate driver is configured to receive the square wave signal to output a second plurality of reversely synchronized signals, wherein the second plurality of reversely synchronized signals include a third signal and a fourth signal; and
an H bridge circuit coupled to the first and second gate drivers, wherein the H bridge circuit includes:
a first plurality of transistors including a first transistor and a second transistor, wherein the first transistor is configured to receive the first signal and the second transistor is configured to receive the second signal to output a first waveform;
a second plurality of transistors including a third transistor and a fourth transistor, wherein the third transistor is configured to receive the third signal and the fourth transistor is configured to receive the fourth signal to output a second waveform; and
a reactive circuit coupled to the first and second transistors, wherein the reactive circuit is configured to receive the first waveform to output a sinusoidal radio frequency (RF) signal.