CPC H04N 19/86 (2014.11) [H04N 19/117 (2014.11); H04N 19/14 (2014.11); H04N 19/176 (2014.11); H04N 19/182 (2014.11); H04N 19/80 (2014.11)] | 20 Claims |
1. An image processing device for use in an image encoder and/or an image decoder for deblocking a block edge between a first block and a second block of an image, the image processing device comprising:
at least one processor; and
one or more memories coupled to the at least one processor and storing programming instructions for execution by the at least one processor to cause the device to:
generate filtered pixel values from original pixel values of a first pixel, a second pixel and a third pixel, the second pixel and the third pixel being in a same decision pixel line and the first pixel is in a non-decision pixel line;
clip the filtered pixel values of the second pixel and the third pixel using a constant clipping value,
clip the filtered pixel value of the first pixel using a clipping value depending upon a distance of the first pixel from the block edge.
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