US 12,192,135 B2
System and method for SRS switching, transmission, and enhancements
Jialing Liu, Palatine, IL (US); Weimin Xiao, Hoffman Estates, IL (US); Murali Narasimha, Lake Oswego, OR (US); Brian Classon, Beijing (CN); and Qian Cheng, Naperville, IL (US)
Assigned to FUTUREWEI TECHNOLOGIES, INC., Plano, TX (US)
Filed by Futurewei Technologies, Inc., Addison, TX (US)
Filed on Oct. 17, 2022, as Appl. No. 17/967,651.
Application 17/967,651 is a continuation of application No. 16/906,962, filed on Jun. 19, 2020, granted, now 11,476,989.
Application 16/906,962 is a continuation of application No. 16/053,542, filed on Aug. 2, 2018, granted, now 10,693,610, issued on Jun. 23, 2020.
Application 16/053,542 is a continuation of application No. 15/477,639, filed on Apr. 3, 2017, granted, now 10,270,570, issued on Apr. 23, 2019.
Application 16/053,542 is a continuation of application No. PCT/US2017/025577, filed on Mar. 31, 2017.
Claims priority of provisional application 62/401,701, filed on Sep. 29, 2016.
Claims priority of provisional application 62/378,030, filed on Aug. 22, 2016.
Claims priority of provisional application 62/374,527, filed on Aug. 12, 2016.
Claims priority of provisional application 62/336,347, filed on May 13, 2016.
Claims priority of provisional application 62/317,351, filed on Apr. 1, 2016.
Claims priority of provisional application 62/317,327, filed on Apr. 1, 2016.
Prior Publication US 2023/0208578 A1, Jun. 29, 2023
Int. Cl. H04L 5/00 (2006.01); H04L 5/14 (2006.01); H04L 27/26 (2006.01); H04W 48/12 (2009.01); H04W 72/23 (2023.01)
CPC H04L 5/0048 (2013.01) [H04L 5/001 (2013.01); H04L 5/0078 (2013.01); H04L 5/0082 (2013.01); H04L 5/0091 (2013.01); H04L 5/0098 (2013.01); H04L 27/261 (2013.01); H04L 27/262 (2013.01); H04W 48/12 (2013.01); H04W 72/23 (2023.01); H04L 5/0007 (2013.01); H04L 5/14 (2013.01)] 20 Claims
OG exemplary drawing
 
14. An apparatus comprising:
a non-transitory memory storage comprising instructions; and
one or more processors in communication with the non-transitory memory storage, wherein the instructions, when executed by the one or more processors, cause the apparatus to perform:
receiving, from a base station, first configuration information for one or more uplink transmissions of the apparatus on a first component carrier (CC);
receiving, from the base station, second configuration information for sounding resource signal (SRS) carrier switching, the SRS carrier switching being for transmission of one or more sounding resource signals (SRSs) over a second CC different from the first CC; and
transmitting an SRS over the second CC by performing the SRS carrier switching in accordance with the second configuration information, with uplink transmission over the first CC suspended at least during transmission of the SRS and during a radio frequency (RF) retuning time.