US 12,191,886 B2
Recovering scrambling sequence initialization from frozen bits of an uncoded downlink control information vector
Onur Dizdar, London (GB); Matthew David Brown, Hants (GB); Jiancao Hou, Surbiton (GB); Chi-ming Leung, Hardwick (GB); Ata Sattarzadeh Hashemi, Guildford (GB); and Yi Xien Yap, Potters Bar (GB)
Assigned to VIAVI Solutions Inc., Chandler, AZ (US)
Filed by VIAVI Solutions Inc., Chandler, AZ (US)
Filed on Mar. 30, 2023, as Appl. No. 18/128,707.
Prior Publication US 2024/0333311 A1, Oct. 3, 2024
Int. Cl. H03M 13/27 (2006.01); H03M 13/00 (2006.01); H03M 13/13 (2006.01)
CPC H03M 13/2778 (2013.01) [H03M 13/13 (2013.01); H03M 13/635 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A method, comprising:
receiving, by a device, a downlink signal from a base station;
determining, by the device, an input-output relation of polar encoding based on a vector of the downlink signal;
performing, by the device, an interleaving operation with a matrix and the input-output relation to obtain an interleaved vector;
utilizing, by the device, rate matching with the interleaved vector to determine a scrambling sequence of the downlink signal;
utilizing, by the device, a reverse sequence generator with the scrambling sequence to determine a scrambling sequence initialization vector for the scrambling sequence; and
decoding, by the device, the downlink signal based on the scrambling sequence initialization vector and without performing a descrambling operation.