US 12,191,881 B2
Analog-to-digital converter and analog-to-digital conversion method using the same
Jae Hoon Lee, Suwon-si (KR); and Yong Lim, Seoul (KR)
Assigned to Samsung Electronics Co., Ltd., Gyeonggi-do (KR)
Filed by Samsung Electronics Co., Ltd., Suwon-si (KR)
Filed on Jan. 5, 2023, as Appl. No. 18/150,636.
Claims priority of application No. 10-2022-0003406 (KR), filed on Jan. 10, 2022; and application No. 10-2022-0030799 (KR), filed on Mar. 11, 2022.
Prior Publication US 2023/0231571 A1, Jul. 20, 2023
Int. Cl. H03M 1/82 (2006.01); H03M 1/18 (2006.01); H03M 1/46 (2006.01)
CPC H03M 1/825 (2013.01) [H03M 1/182 (2013.01); H03M 1/462 (2013.01)] 20 Claims
OG exemplary drawing
 
1. An analog-to-digital converter (ADC) comprising:
a first comparator configured to generate a first comparison signal on a basis of a first asynchronous clock signal generated from a sampling clock signal, and a second comparator configured to generate a second comparison signal on a basis of a second asynchronous clock signal generated by a first comparison operation completion signal;
a first control logic configured to output a first control signal on a basis of the first comparison signal and a second control logic configured to output a second control signal on a basis of the second comparison signal; and
a first reference signal adjusting circuit configured to adjust a first reference signal on a basis of the first control signal and a second reference signal adjusting circuit configured to adjust a second reference signal on a basis of the second control signal.